Digital receivers require circuits that determine the symbol timing error and the carrier phase or frequency error. Typically in a digital communications system, the output of a demodulator is sampled periodically about once per symbol interval to recover transmitted information. Because the propagation delay from a transmitter to the receiver is unknown at the receiver, the symbol timing is derived from the received signal to sample synchronously an output of the demodulator. The propagation delay in a transmitted signal often creates a carrier offset that must be estimated if a detector is phase-coherent. Any signals transmitted through the communications channel delays those signals and corrupts them by adding Gaussian noise. Symbol synchronization and carrier recovery are required if the signal is detected coherently.
Demodulation requires that any propagation delays be determined. The precision required to synchronize in time to demodulate this received signal often depends on the symbol interval, which is also dependent on the time delay. Different criteria that apply to signal parameter estimation used in demodulation include the maximum-likelihood (ML) criterion and the maximum a posteriori probability (MAP) criterion. With the ML estimation, an observation interval is used as the received signal over a time interval and estimation is performed on a continuous basis, using tracking loops that update estimates. The carrier phase can be estimated using pilot signals as known to those skilled in the art. A phase-locked loop (PLL) is used to acquire and track the carrier component. In other techniques, the carrier phase estimate is derived directly from the modulated signal. That technique has the advantage that the total transmitter power is allocated to the transmission of the information-bearing signal.
Decision-directed loops are often used to estimate phase as known to those skilled in the art. Typically it can be assumed that the information sequence over an observation interval has been estimated using a decision-directed parameter estimation. Non-decision-directed loops also are known and used. Timing recovery often is accomplished using a square-law device and a Costas loop, as known to those skilled in the art.
In these digital communication systems, the demodulator output is sampled periodically at precise sampling time instants to obtain a symbol timing estimation and determine a clock signal at the receiver. Extracting a clock signal is known as symbol synchronization or timing recovery. In one known technique, a receiver circuit determines the frequency at which outputs of matched filters or correlators are sampled, but also determines where to take the samples within each symbol interval. The choice of the sampling instant is typically known as the timing phase.
A Decision Directed Timing Detector (DDTD) can be used similar to the “Digital Data Transition Loop” (DTTL) by Lindsey as set forth in his article Technical Publication TP-73-18, Bit Synchronization System Performance Characterization, Modeling, and Tradeoff Study (Airtask A5355352-054E-3F09905003), W. C. Lindsey, University of Southern California, Sep. 4, 1973, the disclosure which is hereby incorporated by reference in its entirety. When there is no transition a zero is sent as the error. When a transition occurs the transition sample is used to determine the error term. This technique works for low order modulations like BPSk and QPSK and only requires two samples per symbol. A non-decision-directed timing estimation can also be used. Often correlators are used in place of equivalent matched filters with two correlators integrating over a symbol interval and an error signal formed by taking the difference between the absolute values of two correlator outputs.
A well known technique and timing recovery loop is an all-digital timing recovery loop that also includes a Gardner timing recovery algorithm. It is in widespread use and uses two samples per symbol. A Gardner timing recovery circuit recovers the symbol timing phase of the input signal using Gardner's method. This circuit implements a non-data-aided feedback method that is independent of carrier phase recovery. The timing error detector that forms part of the circuit's algorithm requires at least two samples per symbol, one of which is the point at which the decision can be made. The recovery method estimates the symbol timing phase offset for each incoming symbol and outputs the signal value corresponding to the estimated symbol sampling instant. The second output returns the estimated timing phase recovery offset for each symbol, which is a non-negative real number less than N, where N is the number of samples per symbol. The error update gain parameter is the step size used for updating the successive phase estimates.
Insensitive to carrier offsets, the timing recovery loop can lock first, therefore, simplifying the task of carrier recovery. Error for the Gardner algorithm is computed using the following equation:en=(yn−yn-2)yn-1 where the spacing between yn and yn-2 is T seconds and the spacing between yn and yn-1 is T/2 seconds.
The sign of the Gardner error can be used to determine whether the sampling is correct, late or early. Gardner error is most useful on symbol transitions. A description of the Gardner timing recovery algorithm is given in the article: Gardner, F. M., “A BPSK/QPSK Timing-Error Detector for Sampled Receivers,” IEEE Transactions on Communications, Vol. COM-34, No. 5, May 1986, pp. 423-429, the disclosure which is hereby incorporated by reference in its entirety.
In some instances with higher order modulations, transitions from one constellation point to the next may not be parallel with either a real or imaginary axis. As a result, some traditional symbol tracking detectors rely on the absolute value of a highly oversampled signal. Often the lower level modulations will use only two samples per symbol and it is desirable to leverage existing signal process and functions to provide symbol tracking with higher order modulations.